Product Description

The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model in favor of multi-core microprocessors--chips that combine two or more processors in a single package. In the fourth edition of Computer Architecture, the authors focus on this historic shift, increasing their coverage of multiprocessors and exploring the most effective ways of achieving parallelism as the key to unlocking the power of multiple processor architectures. Additionally, the new edition has expanded and updated coverage of design topics beyond processor performance, including power, reliability, availability, and dependability.

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Increased coverage on achieving parallelism with multiprocessors.

Case studies of latest technology from industry including the Sun Niagara Multiprocessor, AMD Opteron, and Pentium 4.

Three review appendices, included in the printed volume, review the basic and intermediate principles the main text relies upon.

Eight reference appendices, collected on the CD, cover a range of topics including specific architectures, embedded systems, application specific processors--some guest authored by subject experts.

Product Details

• Amazon Sales Rank: #19969 in Books
• Published on: 2006-09-27
• Original language: English
• Number of items: 1
• Binding: Paperback
• 704 pages

Review
"If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach, 4th Edition. You need one. Tours leave on the hour."
- Robert Colwell, Intel lead designer

"The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of
covering most of the major architectural approaches employed today."
- William Wong, Electronic Design, November 2006

"Computer hardware is entering into a new era, what with multicore processing, virtualization and other enhancements . Computer Architecture covers these topics and updates the insightful work in the earlier editions that laid out the full range of metrics needed for evaluating processor performance."
- Joab Jackson, GCN, November 20, 2006

About the Author

John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches. Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.

David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project. In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM. All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal.

Customer Reviews

The next edition of the definitive series; another must-have
Computer architecture has seen vast changes in the last 20 years, and fortunately, H&P somehow manage to do a new edition about every 5 years, often enough to stay current. When the First Edition appeared, it quickly became *the* standard textbook on the topic, to be replaced in that role by each successive edition.

Computer architectures complexify over time, and so do books. The Third Edition was about 1100 pages long. The Fourth has been shrunk back to something more manageable by moving subsidiary details to a CD included with the book.

This edition is well worth having, even if one already has the earlier ones. In particular, the additional material on multiprocessors is especially welcome, given that it has become much more difficult to speed up uniprocessors.

Most people who work in or near computer systems architecture know these books, but I have often recommended them to others, such as technology journalists, venture capitalists, and financial analysts, i.e., people who are rarely computer archtiects, but need to understand computer technology and its trends. Many such have been surprised to find the book was useful to them.

H&P write very clearly, and each chapter outlines its key concepts for a topic, then works down to detailed analyses, and then comes back up to summarize. hence, I've often recommended to people:

1) Read the first few sections of each chapter.

2) In each remaining section per chapter, read until the going gets heavy, then skip to the next section. In some cases, this will happen after reading the first paragraph, but don't worry, the writing will return to a higher level.

3) Read "Concluding Remarks" and any "Fallacies and Pitfalls" or Historical Perspectives" sections at the end of a chapter.

Anyway, I expect this Edition will be just as indispensable as the earlier ones.

Informative, but poorly organized
I had this book for a graduate course in computer science, and after having been through it, I can say several parts of it are in major need of a rewrite. To be fair, a lot of the material was engaging, and even fun to read; but the layout was so awful that much of what they were saying couldn't be understood by someone not already familiar with the subject without wading through the appendices. In their defense, it is the fourth edition of the book, and the technology has changed much since its inception, so the format is going to be a little messed up. This is also likewise a major strike against them in the area of the exercises: Many of them are very badly written, have little to no relation to what is actually taught in the text, and are fraught with obvious errors that should have been caught two editions ago. On a few of them, even our instructor (who is very knowledgeable) had to throw up his hands and declare that it was anyone's guess.

All in all, this text has a lot good information and potential, but badly needs revision and restructuring if it's to be a truly great learning tool.

a must-have for computer engineers
I read the 3rd edition cover to cover a few years ago and was amazed by its comprehensive coverage for computing related topics from high level to details. Now, the 4th edition is no worse and worth the money. With significant shift from single processor to multiprocessor, it matches the technology trend and stays on top of current industry challenges. This book is a definitely must have for both learning and referencing.

Regretfully, the publisher decided to save cost by moving many useful appendix chapters to CD and use paperback. The stretch to other topics like virtual memory, networking seems unnecessary. But that doesn't affect the overall book quality.

Combining this architecture level view with in-depth coverage of other important computer areas like "Computer organization and design", "operating system concepts" and "computer network", you will have a clear view of the whole infrastructure of the high tech industry.